1. Field of the Invention
The present invention relates to a data processing device and a semiconductor integrated circuit device, especially to an abnormality detection method for detecting operation abnormalities of the data processing device and the semiconductor integrated circuit.
2. Description of Related Art
In recent years, following a rise of global concerns to an environmental problem, regulations of power consumption or a standby power requirement have come to be required. Various electronic devices used in everyday life, such as home-oriented disaster prevention and security equipments and portable devices, etc., have prevailed increasingly. In the field of such electronic devices, development competition in enhancement of extended life and miniaturization of a battery to be used has become intense. Accordingly, energy saving in a system level is becoming an important subject.
In a micro controller for controlling a standby state of a system, and a micro controller to be used for a battery-driven small system, an intermittent operation which repeats alternately a standby mode in which only a part of peripheral functions operate, and a normal operation mode in which both of the peripheral functions and a CPU operate, is worth considering from a viewpoint of low power consumption. In application aiming at a periodical loading of a signal outputted from an external device or a sensor, lowering power consumption is generally performed by starting the normal operation mode in an event-driven manner.
On the other hand, in a digital circuit of a semiconductor integrated circuit, there is an asynchronous design technique which reduces consumption current in a clock synchronous operation, by employing a handshake signal of a preceding and a following circuit of a flip-flop as a clock input, instead of the ordinal clock signal to be inputted into the flip-flop. Also in a micro controller which is operated in an event-driven manner, it is possible to use the asynchronous design technique which does not employ a clock, in order to reduce power consumption.
In an ordinary micro controller, an abnormality detection of CPU operation is performed by employing a timer counter called a watchdog timer in many cases. In the method utilizing a watchdog timer, a counter counts a clock, and a CPU clears the counter for every fixed time by instruction so that the counter may not overflow. If the CPU operates normally, the counter will not overflow. When an overflow is detected, it is determined that abnormalities due to an overrun, etc. of the CPU have occurred. That is, since the abnormality detection method by means of a watchdog timer requires a clock for an abnormality detection, it is difficult to desynchronize the abnormality detection method. Accordingly, what is expected is realization of an abnormality detection circuit which can be implemented also in an asynchronous circuit.
In cases where a CPU is realized by the asynchronous design technique, when a noise intermingles unintentionally to a signal serving as an operation trigger, due to a power supply noise etc. in a standby state, there is a possibility that a handshake circuit may malfunction, updating a value of a program counter or various flag registers to a false value. It is thought that such a possibility is higher than malfunction at the time of a clock stoppage in a CPU of a synchronous system. Accordingly, a measure for realizing a safer system is desired to be taken.
Japanese Patent Application Publication No. 2000-20352 discloses technology for detecting abnormalities by monitoring a stack pointer employed when a micro controller performs an interrupt process. The stack pointer specifies a storage destination address of a stack which stores an address information, etc. of a return point. Abnormalities are detected when data is excessively saved to the stack, or when data is excessively recovered from the stack.